EDN

Toshiba taps Canon’s SOI wafer process

TOKYO — In a major boost for silicon-on-insulator technology, Toshiba Corp. will adopt Canon Inc.'s Eltran SOI wafer process for broadband microprocessors built in 0.1-micron and 0.07-micron process ...
EDN

SiGen expands SOI process to cover thick and thin silicon layers

CAMPBELL, Calif.–Silicon Genesis Corp. today announced an expansion of its silicon-on-insulator wafer production technology to deliver SOI substrates with a greater range silicon-thickness layers for ...
WRBL

SIGen Enhances CMOS Performance by 3DIC Wafer Scale Stacking Using Proprietary NANOCLEAVE(TM) Layer Transfer Process

SiGen is a leading provider of engineered substrate process technology and equipment for the semiconductor, display, and optoelectronics markets. SiGen’s technology is used for production of ...
Digi Times

GlobalWafers maintains course amid US CHIPS Act funding uncertainty

In St. Peters, Missouri, MEMC will produce 12-inch Silicon-On-Insulator (SOI) wafers in the first half of 2025. These wafers enhance performance in harsh environments and are commonly used in defense ...
AZOM

Curved Shapes with Mask Wafer Co-Optimization

One of the main challenges in developing semiconductor chip technology is making electronic components smaller and more effective. This difficulty is most noticeable in lithography, which is the ...
Business Wire

Silicon Wafer Supplier Okmetic Expands Its RFSi™ Portfolio with Tailored Silicon Substrate for Thin Film Surface Acoustic Wave Hybrid Structures

The Game-Changing Technology Combines Low-Loss Crystal Material and Engineered Films to Create the Industry’s First Wafer with Ultra-Flat Properties VANTAA, Finland--(BUSINESS WIRE)--Okmetic, the ...